苗火 Nicholas

[embeded] Port u-boot to mini2440 (1)

2016-2-26 萧 写技术

Step one -> Make fold for mini2440:
1.cp board/sbc2410 board/mini2440
2.touch board/mini2440/nand_read.c

/*
 * nand_read.c: Simple NAND read functions for booting from NAND
 *
 * This is used by cpu/arm920/start.S assembler code,
 * and the board-specific linker script must make sure this
 * file is linked within the first 4kB of NAND flash.
 *
 * Taken from GPLv2 licensed vivi bootloader,
 * Copyright (C) 2002 MIZI Research, Inc.
 *
 * Author: Hwang, Chideok 
 * Date  : $Date: 2004/02/04 10:37:37 $
 *
 * u-boot integration and bad-block skipping (C) 2006 by OpenMoko, Inc.
 * Author: Harald Welte 
 */

#include <common.h>
#include <linux/mtd/nand.h>


#define __REGb(x)	(*(volatile unsigned char *)(x))
#define __REGw(x)	(*(volatile unsigned short *)(x))
#define __REGi(x)	(*(volatile unsigned int *)(x))
#define NF_BASE		0x4e000000
#if defined(CONFIG_S3C2410)
#define NFCONF		__REGi(NF_BASE + 0x0)
#define NFCMD		__REGb(NF_BASE + 0x4)
#define NFADDR		__REGb(NF_BASE + 0x8)
#define NFDATA		__REGb(NF_BASE + 0xc)
#define NFSTAT		__REGb(NF_BASE + 0x10)
#define NFSTAT_BUSY	1
#define nand_select()	(NFCONF &= ~0x800)
#define nand_deselect()	(NFCONF |= 0x800)
#define nand_clear_RnB()	do {} while (0)
#elif defined(CONFIG_S3C2440) || defined(CONFIG_S3C2442)
#define NFCONF		__REGi(NF_BASE + 0x0)
#define NFCONT		__REGi(NF_BASE + 0x4)
#define NFCMD		__REGb(NF_BASE + 0x8)
#define NFADDR		__REGb(NF_BASE + 0xc)
#define NFDATA		__REGb(NF_BASE + 0x10)
#define NFDATA16	__REGw(NF_BASE + 0x10)
#define NFSTAT		__REGb(NF_BASE + 0x20)
#define NFSTAT_BUSY	1
#define nand_select()	(NFCONT &= ~(1 << 1)) #define nand_deselect() (NFCONT |= (1 << 1)) #define nand_clear_RnB() (NFSTAT |= (1 << 2)) #endif static inline void nand_wait(void) { int i; while (!(NFSTAT & NFSTAT_BUSY)) for (i=0; i<10; i++); } struct boot_nand_t { int page_size; int block_size; int bad_block_offset; // unsigned long size; }; #if 0 #if defined(CONFIG_S3C2410) || defined(CONFIG_MINI2440) /* configuration for 2410 with 512byte sized flash */ #define NAND_PAGE_SIZE 512 #define BAD_BLOCK_OFFSET 5 #define NAND_BLOCK_MASK (NAND_PAGE_SIZE - 1) #define NAND_BLOCK_SIZE 0x4000 #else /* configuration for 2440 with 2048byte sized flash */ #define NAND_5_ADDR_CYCLE #define NAND_PAGE_SIZE 2048 #define BAD_BLOCK_OFFSET NAND_PAGE_SIZE #define NAND_BLOCK_MASK (NAND_PAGE_SIZE - 1) #define NAND_BLOCK_SIZE (NAND_PAGE_SIZE * 64) #endif /* compile time failure in case of an invalid configuration */ #if defined(CONFIG_S3C2410) && (NAND_PAGE_SIZE != 512) #error "S3C2410 does not support nand page size != 512" #endif #endif static int is_bad_block(struct boot_nand_t * nand, unsigned long i) { unsigned char data; unsigned long page_num; nand_clear_RnB(); if (nand->page_size == 512) {
		NFCMD = NAND_CMD_READOOB; /* 0x50 */
		NFADDR = nand->bad_block_offset & 0xf;
		NFADDR = (i >> 9) & 0xff;
		NFADDR = (i >> 17) & 0xff;
		NFADDR = (i >> 25) & 0xff;
	} else if (nand->page_size == 2048) {
		page_num = i >> 11; /* addr / 2048 */
		NFCMD = NAND_CMD_READ0;
		NFADDR = nand->bad_block_offset & 0xff;
		NFADDR = (nand->bad_block_offset >> 8) & 0xff;
		NFADDR = page_num & 0xff;
		NFADDR = (page_num >> 8) & 0xff;
		NFADDR = (page_num >> 16) & 0xff;
		NFCMD = NAND_CMD_READSTART;
	} else {
		return -1;
	}
	nand_wait();
	data = (NFDATA & 0xff);
	if (data != 0xff)
		return 1;

	return 0;
}

static int nand_read_page_ll(struct boot_nand_t * nand, unsigned char *buf, unsigned long addr)
{
	unsigned short *ptr16 = (unsigned short *)buf;
	unsigned int i, page_num;

	nand_clear_RnB();

	NFCMD = NAND_CMD_READ0;

	if (nand->page_size == 512) {
		/* Write Address */
		NFADDR = addr & 0xff;
		NFADDR = (addr >> 9) & 0xff;
		NFADDR = (addr >> 17) & 0xff;
		NFADDR = (addr >> 25) & 0xff;
	} else if (nand->page_size == 2048) {
		page_num = addr >> 11; /* addr / 2048 */
		/* Write Address */
		NFADDR = 0;
		NFADDR = 0;
		NFADDR = page_num & 0xff;
		NFADDR = (page_num >> 8) & 0xff;
		NFADDR = (page_num >> 16) & 0xff;
		NFCMD = NAND_CMD_READSTART;
	} else {
		return -1;
	}
	nand_wait();

#if defined(CONFIG_S3C2410)
	for (i = 0; i < nand->page_size; i++) {
		*buf = (NFDATA & 0xff);
		buf++;
	}
#elif defined(CONFIG_S3C2440) || defined(CONFIG_S3C2442)
	for (i = 0; i < (nand->page_size>>1); i++) {
		*ptr16 = NFDATA16;
		ptr16++;
	}
#endif

	return nand->page_size;
}

static unsigned short nand_read_id()
{
	unsigned short res = 0;
	NFCMD = NAND_CMD_READID;
	NFADDR = 0;
	res = NFDATA;
	res = (res << 8) | NFDATA; return res; } extern unsigned int dynpart_size[]; /* low level nand read function */ int nand_read_ll(unsigned char *buf, unsigned long start_addr, int size) { int i, j; unsigned short nand_id; struct boot_nand_t nand; /* chip Enable */ nand_select(); nand_clear_RnB(); for (i = 0; i < 10; i++) ; nand_id = nand_read_id(); if (0) { /* dirty little hack to detect if nand id is misread */ unsigned short * nid = (unsigned short *)0x31fffff0; *nid = nand_id; } if (nand_id == 0xec76 || /* Samsung K91208 */ nand_id == 0xad76 ) { /*Hynix HY27US08121A*/ nand.page_size = 512; nand.block_size = 16 * 1024; nand.bad_block_offset = 5; // nand.size = 0x4000000; } else if (nand_id == 0xecf1 || /* Samsung K9F1G08U0B */ nand_id == 0xecda || /* Samsung K9F2G08U0B */ nand_id == 0xecd3 ) { /* Samsung K9K8G08 */ nand.page_size = 2048; nand.block_size = 128 * 1024; nand.bad_block_offset = nand.page_size; // nand.size = 0x8000000; } else { return -1; // hang } if ((start_addr & (nand.block_size-1)) || (size & ((nand.block_size-1)))) return -1; /* invalid alignment */ for (i=start_addr; i < (start_addr + size);) { #ifdef CONFIG_S3C2410_NAND_SKIP_BAD if (i & (nand.block_size-1)== 0) { if (is_bad_block(&nand, i) || is_bad_block(&nand, i + nand.page_size)) { /* Bad block */ i += nand.block_size; size += nand.block_size; continue; } } #endif j = nand_read_page_ll(&nand, buf, i); i += j; buf += j; } /* chip Disable */ nand_deselect(); return 0; }

3.Edit files of here.Change "sbc2410" to "mini2440" in files.
  Makefile must include "nand_read.o".
  Let "gd->bd->bi_arch_number = MACH_TYPE_MINI2440;" in mini2440.c

Step two -> Edit files:
1.Makefile
Add cross compile define.
Add define of mini2440.

--- u-boot-2009.08/Makefile	2009-09-01 01:57:42.000000000 +0800
+++ u-boot-2009.08_ok/Makefile	2016-02-26 11:21:17.358675492 +0800
@@ -158,6 +158,8 @@ sinclude $(obj)include/autoconf.mk
 include $(obj)include/config.mk
 export	ARCH CPU BOARD VENDOR SOC
 
+CROSS_COMPILE = arm-linux-
+
 # set default to nothing for native builds
 ifeq ($(HOSTARCH),$(ARCH))
 CROSS_COMPILE ?=
@@ -2997,6 +2999,10 @@ smdk2400_config	:	unconfig
 smdk2410_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t smdk2410 samsung s3c24x0
 
+mini2440_config	:	unconfig
+	@$(MKCONFIG) $(@:_config=) arm arm920t mini2440 NULL s3c24x0
+
+
 SX1_stdout_serial_config \
 SX1_config:		unconfig
 	@mkdir -p $(obj)include

2.cpu/arm920t/start.S
Edit as cpu sheet. 
Set CPU as SVC mode;
Close watchdog;
Set Clock.

--- u-boot-2009.08/cpu/arm920t/start.S	2009-09-01 01:57:42.000000000 +0800
+++ u-boot-2009.08_ok/cpu/arm920t/start.S	2016-02-26 12:16:14.230812065 +0800
@@ -114,8 +114,8 @@ start_code:
 	orr	r0,r0,#0xd3
 	msr	cpsr,r0
 
-	bl coloured_LED_init
-	bl red_LED_on
+@	bl coloured_LED_init
+@	bl red_LED_on
 
 #if	defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK)
 	/*
@@ -131,7 +131,7 @@ copyex:
 	bne	copyex
 #endif
 
-#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)
+#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
 	/* turn off the watchdog */
 
 # if defined(CONFIG_S3C2400)
@@ -145,6 +145,14 @@ copyex:
 #  define CLKDIVN	0x4C000014	/* clock divisor register */
 # endif
 
+#if defined(CONFIG_S3C2440)
+#define CLK_CTL_BASE		0x4c000000
+#define MDIV_405		0x7f<<12
+#define PSDIV_405		0x21
+#define MDIV_200		0xa1<<12
+#define PSDIV_200		0x31
+#endif
+
 	ldr     r0, =pWTCON
 	mov     r1, #0x0
 	str     r1, [r0]
@@ -161,12 +169,43 @@ copyex:
 	str	r1, [r0]
 # endif
 
+# if defined(CONFIG_S3C2440)
+	ldr	r1, =0x7fff
+	ldr	r0, =INTSUBMSK
+	str	r1, [r0]
+# endif
+
+#if defined(CONFIG_S3C2440)
+	/* FCLK:HCLK:PCLK=1:4:8 */
+	ldr	r0, =CLKDIVN
+	mov	r1, #5
+	str	r1, [r0]
+
+	mrc	p15, 0, r1, c1, c0, 0
+	orr	r1, r1, #0xc0000000
+	mcr	p15, 0, r1, c1, c0, 0
+
+	mov 	r1, #CLK_CTL_BASE
+	mov	r2, #MDIV_405
+	add	r2, r2, #PSDIV_405
+	str	r2, [r1, #0x04]
+#else
 	/* FCLK:HCLK:PCLK = 1:2:4 */
 	/* default FCLK is 120 MHz ! */
 	ldr	r0, =CLKDIVN
 	mov	r1, #3
 	str	r1, [r0]
-#endif	/* CONFIG_S3C2400 || CONFIG_S3C2410 */
+
+	mrc	p15, 0, r1, c1, c0, 0
+	orr	r1, r1, #0xc0000000
+	mcr	p15, 0, r1, c1, c0, 0
+
+	mov	r1, #CLK_CTL_BASE
+	mov	r2, #MDIV_200
+	add	r2, r2, #PSDIV_200
+	str	r2, [r1,#0x04]
+#endif
+#endif	/* CONFIG_S3C2400 || CONFIG_S3C2410 || CONFIG_S3C2440 */
 
 	/*
 	 * we do sys-critical inits only at reboot,
@@ -176,13 +215,124 @@ copyex:
 	bl	cpu_init_crit
 #endif
 
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
-relocate:				/* relocate U-Boot to RAM	    */
+
+/***************** CHECK_CODE_POSITION ********************************/
 	adr	r0, _start		/* r0 <- current position of code   */
 	ldr	r1, _TEXT_BASE		/* test if we run from flash or RAM */
 	cmp     r0, r1                  /* don't reloc during debug         */
 	beq     stack_setup
+/****************** CHECK_CODE_POSTION end *****************/
+
+/***************** CHECK_BOOT_FLASH *********************/
+	ldr	r1, =( (4<<28)|(3<<4)|(3<<2) )
+	mov	r0, #0
+	str	r0, [r1]
+
+	mov	r1, #0x3c
+	ldr	r0, [r1]
+	cmp	r0, #0
+	bne	relocate
+
+	/* recovery */
+	ldr	r0, =(0xdeadbeef)
+	ldr	r1, =( (4<<28)|(3<<4)|(3<<2) )
+	str	r0, [r1]
+/***************** CHECK_BOOT_FLASH  end*********************/
+
+
+/****************  NAND_BOOT***************************/
+#define LENGTH_UBOOT	0x60000
+#define	NAND_CTL_BASE	0x4e000000
+
+#ifdef	CONFIG_S3C2440
+/* Offset */
+#define	oNFCONF	0x00
+#define	oNFCONT	0x04
+#define	oNFCMD	0x08
+#define	oNFSTAT	0x20
+
+	@ reset NAND
+	mov	r1, #NAND_CTL_BASE
+	ldr	r2, =( (7<<12)|(7<<8)|(7<<4)|(0<<0) )
+	str	r2, [r1, #oNFCONF]
+	ldr	r2, [r1, #oNFCONF]
+
+	ldr	r2, =( (1<<4)|(0<<1)|(1<<0) )
+	str	r2, [r1, #oNFCONT]
+	ldr	r2, [r1, #oNFCONT]
+
+	ldr	r2, =(0x6)
+	str	r2, [r1, #oNFSTAT]
+	ldr	r2, [r1, #oNFSTAT]
+
+	mov	r2, #0xff @RESET command
+	strb	r2, [r1, #oNFCMD]
+
+	mov	r3, #0    @wait
+
+nand1:
+	add	r3, r3, #0x1
+	cmp	r3, #0xa
+	blt	nand1
+
+nand2:
+	ldr	r2, [r1, #oNFSTAT]
+	tst	r2, #0x4
+	beq	nand2
+
+	ldr	r2, [r1, #oNFCONT]
+	orr	r2, r2, #0x2
+	str	r2, [r1, #oNFCONT]
+
+	@get read to call C function (for nand_read())
+	ldr	sp, DW_STACK_START
+	mov	fp, #0
+
+	@copy U-BOOT to RAW
+	ldr	r0, =TEXT_BASE
+	mov	r1, #0x0
+	mov	r2, #LENGTH_UBOOT
+	bl	nand_read_ll
+	tst	r0, #0x0
+	beq	ok_nand_read
+
+bad_nand_read:
+loop2:
+	b	loop2
+
+ok_nand_read:
+	@verify
+	mov	r0, #0
+	ldr	r1, =TEXT_BASE
+	mov	r2, #0x400
 
+go_next:
+	ldr	r3, [r0], #4
+	ldr	r4, [r1], #4
+	teq	r3, r4
+	bne	notmatch
+	subs	r2, r2, #4
+	beq	stack_setup
+	bne	go_next
+
+notmatch:
+loop3:
+	b	loop3
+#endif /* CONFIG_S3C2440 */
+
+/****************  NAND_BOOT end ***************************/
+
+
+
+/**************  NOR_BOOT   *********************/
+relocate:
+	/******** CHECK_FOR_MAGIC_NUMBER *************/
+	ldr	r1, =(0xdeadbeef)
+	cmp	r0, r1
+	bne	loop3
+	/******** CHECK_FOR_MAGIC_NUMBER end *************/
+	adr	r0, _start
+	ldr	r1, _TEXT_BASE
 	ldr	r2, _armboot_start
 	ldr	r3, _bss_start
 	sub	r2, r3, r2		/* r2 <- size of armboot            */
@@ -193,7 +343,12 @@ copy_loop:
 	stmia	r1!, {r3-r10}		/* copy to   target address [r1]    */
 	cmp	r0, r2			/* until source end addreee [r2]    */
 	ble	copy_loop
-#endif	/* CONFIG_SKIP_RELOCATE_UBOOT */
+
+/***************** NOR_BOOT end  *******************************/
+
+
+
+
 
 	/* Set up the stack						    */
 stack_setup:
@@ -217,8 +372,31 @@ clbss_l:str	r2, [r0]		/* clear loop...
 
 	ldr	pc, _start_armboot
 
+#if defined(CONFIG_MINI2440_LED)
+#define	GPIO_CTL_BASE	0x56000000
+#define	oGPIO_B		0x10
+#define	oGPIO_CON	0x0
+/* R/W, Configures the pins of the port */
+#define	oGPIO_DAT	0x4
+#define	oGPIO_UP	0x8
+/* R/W, Pull-up disable register */
+	mov	r1, #GPIO_CTL_BASE
+	add	r1, r1, #oGPIO_B
+	ldr	r2, =0x295551
+	str	r2, [r1, #oGPIO_CON]
+	mov	r2, #0xff
+	str	r2, [r1, #oGPIO_UP]
+	ldr	r2, =0x1c1
+	str	r2, [r1, #oGPIO_DAT]
+#endif
+
 _start_armboot:	.word start_armboot
 
+#define STACK_BASE	0x33f00000
+#define	STACK_SIZE	0x10000
+	.align	2
+DW_STACK_START:	.WORD	STACK_BASE+STACK_SIZE-4
+
 
 /*
  *************************************************************************

3.lib_arm/board.c

--- u-boot-2009.08/lib_arm/board.c	2009-09-01 01:57:42.000000000 +0800
+++ u-boot-2009.08_ok/lib_arm/board.c	2016-02-26 13:22:06.102975772 +0800
@@ -49,6 +49,7 @@
 #include <nand.h>
 #include <onenand_uboot.h>
 #include <mmc.h>
+#include <s3c2410.h>
 
 #ifdef CONFIG_DRIVER_SMC91111
 #include "../drivers/net/smc91111.h"
@@ -118,6 +119,7 @@ void *sbrk (ptrdiff_t increment)
 }
 
 
+#if 0
 /************************************************************************
  * Coloured LED functionality
  ************************************************************************
@@ -141,6 +143,7 @@ void inline __blue_LED_on(void) {}
 void inline blue_LED_on(void)__attribute__((weak, alias("__blue_LED_on")));
 void inline __blue_LED_off(void) {}
 void inline blue_LED_off(void)__attribute__((weak, alias("__blue_LED_off")));
+#endif
 
 /************************************************************************
  * Init Utilities							*
@@ -166,7 +169,13 @@ static int init_baudrate (void)
 
 static int display_banner (void)
 {
-	printf ("\n\n%s\n\n", version_string);
+#if defined(CONFIG_MINI2440_LED)
+	struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
+	gpio->GPBDAT = 0x101;
+#endif
+	printf("\n\n%s\n\n", version_string);
+	printf("modified by nicholas (nicholas@anycle.com)");
+	printf("Love Linux forever \n\n");
 	debug ("U-Boot code: %08lX -> %08lX  BSS: -> %08lX\n",
 	       _armboot_start, _bss_start, _bss_end);
 #ifdef CONFIG_MODEM_SUPPORT
@@ -304,6 +313,9 @@ void start_armboot (void)
 	unsigned long addr;
 #endif
 
+#if defined(CONFIG_MINI2440_LED)
+	struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
+#endif
 	/* Pointer is writable since we allocated a register for it */
 	gd = (gd_t*)(_armboot_start - CONFIG_SYS_MALLOC_LEN - sizeof(gd_t));
 	/* compiler optimization barrier needed for GCC >= 3.4 */
@@ -466,6 +478,16 @@ extern void davinci_eth_set_mac_addr (co
 	reset_phy();
 #endif
 #endif
+
+#if defined(CONFIG_MINI2440_LED)
+	gpio->GPBDAT = 0x0;
+#endif
+
+#if defined(CONFIG_CFB_CONSOLE)
+	printf("%s\n", version_string);
+	printf("Modified by nicholas \n (nicholas@anycle.com)\n");
+	printf("Why I am here\n");
+#endif
 	/* main_loop() can return to retry autoboot, if so just run it again. */
 	for (;;) {
 		main_loop ();

4.board/mini2440/lowlevel_init.S

--- u-boot-2009.08/board/sbc2410x/lowlevel_init.S	2009-09-01 01:57:42.000000000 +0800
+++ u-boot-2009.08_ok/board/mini2440/lowlevel_init.S	2016-02-26 14:42:31.151175651 +0800
@@ -116,10 +116,17 @@
 /* REFRESH parameter */
 #define REFEN			0x1	/* Refresh enable */
 #define TREFMD			0x0	/* CBR(CAS before RAS)/Auto refresh */
-#define Trp			0x0	/* 2clk */
 #define Trc			0x3	/* 7clk */
 #define Tchr			0x2	/* 3clk */
+
+#if defined(CONFIG_S3C2440)
+#define Trp			0x2 	/* 2clk */
+#define REFCNT			0x1012
+#else
+#define Trp			0x0 	/* 2clk */
 #define REFCNT			0x0459
+#endif
+
 /**************************************/
 
 _TEXT_BASE:
@@ -131,8 +138,10 @@ lowlevel_init:
 	/* make r0 relative the current location so that it */
 	/* reads SMRDATA out of FLASH rather than memory ! */
 	ldr     r0, =SMRDATA
-	ldr	r1, _TEXT_BASE
+	ldr	r1, =lowlevel_init
 	sub	r0, r0, r1
+	adr	r3, lowlevel_init
+	add	r0, r0, r3
 	ldr	r1, =BWSCON	/* Bus Width Status Controller */
 	add     r2, r0, #13*4
 0:

5.cpu/arm920t/s3c24x0/speed.c

--- u-boot-2009.08/cpu/arm920t/s3c24x0/speed.c	2009-09-01 01:57:42.000000000 +0800
+++ u-boot-2009.08_ok/cpu/arm920t/s3c24x0/speed.c	2016-02-26 13:56:55.975062346 +0800
@@ -30,11 +30,11 @@
  */
 
 #include <common.h>
-#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB)
+#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined(CONFIG_S3C2440) || defined (CONFIG_TRAB)
 
 #if defined(CONFIG_S3C2400)
 #include <s3c2400.h>
-#elif defined(CONFIG_S3C2410)
+#elif defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
 #include <s3c2410.h>
 #endif
 
@@ -67,6 +67,13 @@ static ulong get_PLLCLK(int pllreg)
     p = ((r & 0x003F0) >> 4) + 2;
     s = r & 0x3;
 
+#if defined(CONFIG_S3C2440)
+    if(pllreg == MPLL){
+        return((CONFIG_SYS_CLK_FREQ * m * 2) / (p << s));
+    }else if(pllreg == UPLL){
+    }
+#endif
+
     return((CONFIG_SYS_CLK_FREQ * m) / (p << s));
 }
 
@@ -81,7 +88,21 @@ ulong get_HCLK(void)
 {
     S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
 
+#if defined(CONFIG_S3C2440)
+    if( (clk_power->CLKDIVN & 0x6) == 2 ){
+        return(get_FCLK()/2);
+    }
+    if( (clk_power->CLKDIVN & 0x6) == 6 ){
+        return( (clk_power->CLKDIVN & 0x100)?get_FCLK()/6 : get_FCLK()/3 );
+    }
+    if( (clk_power->CLKDIVN & 0x6) == 4 ){
+        return( (clk_power->CLKDIVN & 0x200)?get_FCLK()/8 : get_FCLK()/4 );
+    }
+    return(get_FCLK());
+
+#else
     return((clk_power->CLKDIVN & 0x2) ? get_FCLK()/2 : get_FCLK());
+#endif
 }
 
 /* return PCLK frequency */

6.cpu/arm920t/u-boot.lds

--- u-boot-2009.08/cpu/arm920t/u-boot.lds	2009-09-01 01:57:42.000000000 +0800
+++ u-boot-2009.08_ok/cpu/arm920t/u-boot.lds	2016-02-26 14:52:55.295201507 +0800
@@ -40,6 +40,8 @@ SECTIONS
 	.text :
 	{
 		cpu/arm920t/start.o	(.text)
+		board/mini2440/lowlevel_init.o	(.text)
+		board/mini2440/nand_read.o	(.text)
 		*(.text)
 	}
 

7.Enable for s3c2440 the same as s3c2410 in these follow files.

cpu/arm920t/s3c24x0/interrupts.c
cpu/arm920t/s3c24x0/timer.c

include/s3c24x0.h

drivers/serial/serial_s3c24x0.c
drivers/rtc/s3c24x0_rtc.c

8.cpu/arm920t/config.mk
Maybe delete the build options "-msoft-float".


Step three ->Make config file for mini2440:
1.cp include/configs/sbc2410.h include/configs/mini2440.h
2.Edit it.Change configs 2410 to 2440.
  CONFIG_S3C2440,CONFIG_MINI2440 


By nicholas@anycle.com

标签: embedded

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